circuit

iSSA: An incremental stochastic simulation algorithm for genetic circuits

Researchers are now developing synthetic genetic circuits to manipulate the biochemical processes within living cells. In order to model and predict the behavior of these circuits, the designer must account for numerous reactions among many chemical …

Genetic design automation

Electronic design automation (EDA) tools have facilitated the design of ever more complex integrated circuits each year. Synthetic biology would also benefit from the development of genetic design automation (GDA) tools. Existing GDA tools require …

A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper)

This paper presents a behavioral synthesis method for asynchronous circuits with bundled-data implementation. This paper extends a behavioral synthesis method for synchronous circuits so that an RTL model of bundled-data implementation is synthesized …

Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits

Abstract models of analog/mixed-signal (AMS) circuits can be used for formal verification and system-level simulation. The difficulty of creating these models precludes their widespread use. This paper presents an automated method to generate …

Hazard Checking of Timed Asynchronous Circuits Revisited

This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from statespace explosion, or efficient algorithms which use a (conservative) approximation to …

Synthesis of Timed Circuits Based on Decomposition

This paper presents a decomposition-based method for timed circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesizes each output individually. It begins by contracting the timed signal …

Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits

This paper presents an efficient method for verifying hazard-freedom in gate-level timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that are optimized using explicit timing information. In asynchronous circuits, …

Symbolic Model Checking of Analog/Mixed-Signal Circuits

This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixed-signal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware description language for AMS circuits. The VHDL-AMS description is …

Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets

System on a chip design results in the integration of digital, analog, and mixed-signal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets …

ILP-based Scheduling for Asynchronous Circuits in Bundled-Data Implementation

In this paper, we propose a new scheduling method for asynchronous circuits in bundled-data implementation. The method is based on integer linear programming (ILP) which explores an optimum schedule under resource or time constraints. To schedule …